Mulldonoch 2

Mulldonoch 2


Xilinx™ XC3S2000 Spartan™-3 FPGA.

Startup FPGA

Xilinx™ XC3S200A-1400A Spartan™-3A FPGA. XC3S200AN also possible for secure applications.

Flash Memory

Two 128 Mbit SPI Flash Memories. First one is used for configuration but has spare space for microprocessor code. Device 2 is totally independent and free to use.

SDRAM Memory

256Mbit, X32 SDRAM. 64-512 Mbit possible.

DIL Headers

Mulldonnoch 2 has our enhanced DIL Headers with 3.3V and DGND power strips. There is also a dedicated regulator for each header that can be set by whatever primary module is plugged in (supporting modules only and one in specific location). This regulator can also be controlled by the startup FPGA allowing circuits to be switched on/off for power management purposes. The regulator voltage/s also can be selected as appropriate bank I/O voltage/s on the Main FPGA. The RHS DIL Header has a 34 high header giving 66 I/O. Top pins and inner pins are power (note orientation to bottom of board). The LHS DIL Header has a 34 high header giving 66 I/O. Top pins and inner pins are power. The TOP DIL Header shares some pins with other headers and other board features. Please check pinout usage carefully before using this header.


Mulldonoch 2 has one Moel-Bryn socket for high performance expansion. Modules like our Swinyard1 can be used in this socket.

PCI104 Interface

32 bit, 33 MHz, 3.3/5V PC104+ interface (PCI) capable of being used for other bus standards or as 5V tolerant general I/O. This interface also support signals to allow board to operate as motherboard and to handle request/grants from add on boards such as our Hollybush1, Hollybush2 or other industry standard boards.

USB Serial Interface

FT232R based serial interface. When plugged into a PC this appears as serial port (other modes possible too). PC drivers available from FTDI. This interface can also be used to remote boot or configure the Main FPGA.

Ethernet Interface

Micrel KSZ8851SNL SPI Ethernet controller. This interface can also be used to remote boot or configure the Main FPGA.

MAC Address

There is a Maxim DS2502 fitted to the Mulldonnoch 2 to provide a unique MAC address. A second device site option is also available for applications that need 2 MAC addresses. Both devices are accessible though the Startup FPGA.

PS2 Interfaces

Two PS2 interfaces to support mouse and keyboard. If not used for PS2 eight 5V tolerant signals are available. Four of these signals have pullups to 5V to facilitate interfacing to 5V CMOS logic devices. This interface can also be used to remote boot or configure the Main FPGA.

Real Time Clock

DS1306 real time clock chip on board. Battery holder on board to support unpowered time keeping and data storage..

General Clocks

Two 3.3V 8 pin DIL oscillator sockets for user fitted clock modules. Fixed 32Mhz and 25MHz oscillators on board. RTC 32.7678KHz also available. Startup FPGA can multiply or divide any of these frequencies. All of these are connected to the startup FPGA and any 4 can be routed to the Main FPGA. A clock can also be supplied by FT232 USB chip but needs to be plugged into USB hosting device.

High Accuracy Clock(option)

1ppm 10MHz clock site supporting D75A-010.0 MHZ TCXO.


3 LEDs connected to startup FPGA. 5 LEDs connected directly to Main FPGA.

DIP Switches

8 DIP switches.

ZIF Expansion(option)

ZIF socket option to support ancillary items like remote displays.


Mulldonoch 2 has several different ways in which it can be powered. Which can be used depends on your add on card requirements. Mulldonoch2 itself is capable of operating from a single 5V supply.

Option1 – 2.1mm Power Jack.

Option2 – USB connector (make be limited by your USB host or power supply).

Option3 – Disk Drive connector.

Option4 – Enterpoint PC104 power card (12-48V input).

On board there are 6 amp switching regulators for 3.3V, 2.5V, 1.8V and 1.2V. There are also user configurable 1.2A regulators for each of the DIL Headers. There is also a LP2996 reference supply regulator.

There is a twin power structure allowing the board to idle in a low power mode and to wakeup and power the Main FPGA and PCI104 stack. This feature is available only in some source power options and configurations.

Programming Cable

Standard 2×7 2mm programming header.