Implementing PCI Express Designs in
Xilinx™ Spartan™-6 FPGAs
Date:- Postponed until October
Location – Malvern Office (UK) or local science park depending on numbers. To be confirmed.
This free half day seminar and lab goes through the process of implementing a custom FPGA PCI Express design in Xilinx™ Spartan™-6 FPGA. The seminar describes how to customise the Xilinx™ PCIe IP core for your specific application, examines common problems, and is integrated with a practical lab using our Raggedstone2 Spartan™-6 development boards to build a custom design.
To register for this seminar send an email to firstname.lastname@example.org